Reduction of annealed-induced wafer defects in dual-damascene copper interconnects
Interconnects in very large scale integration (VLSI) chips are susceptible to failure due to mechanical stress in passivated interconnect lines. These mechanisms play a collective role for intensive research of thermal stability for Cu interconnects reliability in CMOS technologies. This paper prese...
| Published in: | Microelectronics Reliability |
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| Main Author: | |
| Format: | Article |
| Language: | English |
| Published: |
2012
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| Online Access: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84866736037&doi=10.1016%2fj.microrel.2012.07.008&partnerID=40&md5=df23c87ff96874d44e22384c15dde7f6 |