I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching
This article reports on the electrical properties of porous silicon nanostructures (PSiNs) in term of its surface topography. In this study, the PsiNs samples were prepared by using different current density during the electrochemical etching of p-type silicon wafer. PSiNs has been investigated its...
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2-s2.0-84869380229 Husairi F.S.; Ain Zubaidah M.; Yusop S.F.M.; Rusop M.; Abdullah S. I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching 2012 Advanced Materials Research 576 10.4028/www.scientific.net/AMR.576.519 https://www.scopus.com/inward/record.uri?eid=2-s2.0-84869380229&doi=10.4028%2fwww.scientific.net%2fAMR.576.519&partnerID=40&md5=79652061bec1aebbac779423ffaa202d This article reports on the electrical properties of porous silicon nanostructures (PSiNs) in term of its surface topography. In this study, the PsiNs samples were prepared by using different current density during the electrochemical etching of p-type silicon wafer. PSiNs has been investigated its electrical properties and resistances for different surface topography of PSiNs via current-voltage (I-V) measurement system (Keithley 2400) while its physical structural properties was investigated by using atomic force microscopy (AFM-XE100). © (2012) Trans Tech Publications, Switzerland. 10226680 English Conference paper |
author |
Husairi F.S.; Ain Zubaidah M.; Yusop S.F.M.; Rusop M.; Abdullah S. |
spellingShingle |
Husairi F.S.; Ain Zubaidah M.; Yusop S.F.M.; Rusop M.; Abdullah S. I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
author_facet |
Husairi F.S.; Ain Zubaidah M.; Yusop S.F.M.; Rusop M.; Abdullah S. |
author_sort |
Husairi F.S.; Ain Zubaidah M.; Yusop S.F.M.; Rusop M.; Abdullah S. |
title |
I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
title_short |
I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
title_full |
I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
title_fullStr |
I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
title_full_unstemmed |
I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
title_sort |
I-V and surface topography study of nanostructure porous silicon layer prepared by electrochemical etching |
publishDate |
2012 |
container_title |
Advanced Materials Research |
container_volume |
576 |
container_issue |
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doi_str_mv |
10.4028/www.scientific.net/AMR.576.519 |
url |
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84869380229&doi=10.4028%2fwww.scientific.net%2fAMR.576.519&partnerID=40&md5=79652061bec1aebbac779423ffaa202d |
description |
This article reports on the electrical properties of porous silicon nanostructures (PSiNs) in term of its surface topography. In this study, the PsiNs samples were prepared by using different current density during the electrochemical etching of p-type silicon wafer. PSiNs has been investigated its electrical properties and resistances for different surface topography of PSiNs via current-voltage (I-V) measurement system (Keithley 2400) while its physical structural properties was investigated by using atomic force microscopy (AFM-XE100). © (2012) Trans Tech Publications, Switzerland. |
publisher |
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issn |
10226680 |
language |
English |
format |
Conference paper |
accesstype |
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record_format |
scopus |
collection |
Scopus |
_version_ |
1809677611613290496 |