| Summary: | This paper presents the design of a 130 nm CMOS programmable gain amplifier (PGA) designed for reconfigurable systems. The primary objective is to analyse the gain range of the amplifier, which is programmable for various applications, including biological signal processing, intermediate frequency (IF), radio frequency (RF), and low voltage operations. The PGA circuit is designed and simulated using 130 nm Silterra technology in Mentor Graphics software. With a single 1.5 V supply, measured results for a 2-bit digital signal implementation demonstrate that the gain range of the amplifier is adjustable for different applications. The average power consumption of the PGA is 120.61 μW. The CMOS PGA is designed to offer substantial power gain with minimal power consumption trade-offs, making it highly suitable for reconfigurable system applications. © 2024 IEEE.
|
|---|