Effect of gate dielectric to the threshold voltage of 65 nm NMOS structure
With the intention of approaching to a technology of 65 nm, many parameters were changed as a step to fabricate the device. The gate oxide thickness was one of the parameters that have been observed. In this project, Silvaco TCA D tools were used to find the optimum value of threshold voltage for 65...
| 出版年: | AIP Conference Proceedings |
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| 第一著者: | |
| フォーマット: | Conference paper |
| 言語: | English |
| 出版事項: |
2009
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| オンライン･アクセス: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-70450250488&doi=10.1063%2f1.3160209&partnerID=40&md5=b855d4a09e0f871859423c1f4e7de128 |